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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 14:46:47 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 09:58:33 +0000 |
| commit | 45f448f4a4e09b270d964c98d3aced2e73d9d6bc (patch) | |
| tree | d217f38c8a28fbf1c449f17f243b73a7f23db6dd /src/arch/x86/memset.c | |
| parent | c05c2b3fb25ca42a75ecc987178c298f7fe0ead5 (diff) | |
haswell: Relocate `mainboard_romstage_entry` to northbridge
This is what sandybridge does, and if done properly allows factoring out
common settings. Said refactoring will be handled in subsequent commits.
Change-Id: I075eba1324a9e7cbd47e776b097eb940102ef4fe
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/arch/x86/memset.c')
0 files changed, 0 insertions, 0 deletions