diff options
| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2013-04-23 14:49:41 +0200 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2013-05-07 22:40:31 +0200 |
| commit | 1b3e176468213747188c8979a505a4dd8b83f0bd (patch) | |
| tree | 6480f7bebb30f5f322aff95fa9b4bca394443620 /src/arch/x86/lib | |
| parent | ac75bc682b2c546ea01d6ad254df7b1a48a9f68f (diff) | |
x86 I/O APIC: Dump I/O APIC regs in `ioapic.c`
Some southbridges have code in their `lpc.c` files to dump the
I/O APIC registers.
printk(BIOS_SPEW, "Dumping IOAPIC registers\n");
for (i=0; i<3; i++) {
*ioapic_index = i;
printk(BIOS_SPEW, " reg 0x%04x:", i);
reg32 = *ioapic_data;
printk(BIOS_SPEW, " 0x%08x\n", reg32);
}
Add similar code to `src/arch/x86/lib/ioapic.c` so all boards using
the function `set_ioapic_id()` get the debug feature and the other
boards can be more easily adapted in follow-up patches.
Change-Id: Ic59c4c2213ed97bdf3798b3dc6e7cecc30e135d8
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3184
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/x86/lib')
| -rw-r--r-- | src/arch/x86/lib/ioapic.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c index 4964af6757..7fb25ba1f0 100644 --- a/src/arch/x86/lib/ioapic.c +++ b/src/arch/x86/lib/ioapic.c @@ -77,6 +77,7 @@ void clear_ioapic(u32 ioapic_base) void set_ioapic_id(u32 ioapic_base, u8 ioapic_id) { u32 bsp_lapicid = lapicid(); + int i; printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base); @@ -90,6 +91,12 @@ void set_ioapic_id(u32 ioapic_base, u8 ioapic_id) (io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) | (ioapic_id << 24)); } + + printk(BIOS_SPEW, "IOAPIC: Dumping registers\n"); + for (i = 0; i < 3; i++) + printk(BIOS_SPEW, " reg 0x%04x: 0x%08x\n", i, + io_apic_read(ioapic_base, i)); + } static void load_vectors(u32 ioapic_base) |