x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer

On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)

3 files changed, 21 insertions, 21 deletions

diff --git a/src/arch/x86/lib/ebda.c b/src/arch/x86/lib/ebda.c
index 7efc66239a..c6fa4a6024 100644
--- a/src/arch/x86/lib/ebda.c
+++ b/src/arch/x86/lib/ebda.c
@@ -42,7 +42,7 @@ void setup_ebda(u32 low_memory_size, u16 ebda_segment, u16 ebda_size)
 
 	/* Set up EBDA */
 	memset((void *)(ebda_segment << 4), 0, ebda_size);
-	write16((ebda_segment << 4), (ebda_size >> 10));
+	write16((void*)(ebda_segment << 4), (ebda_size >> 10));
 }
 
 void setup_default_ebda(void)
diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c
index 7fb25ba1f0..1c33fe3991 100644
--- a/src/arch/x86/lib/ioapic.c
+++ b/src/arch/x86/lib/ioapic.c
@@ -22,19 +22,19 @@
 #include <console/console.h>
 #include <cpu/x86/lapic.h>
 
-u32 io_apic_read(u32 ioapic_base, u32 reg)
+u32 io_apic_read(void *ioapic_base, u32 reg)
 {
 	write32(ioapic_base, reg);
 	return read32(ioapic_base + 0x10);
 }
 
-void io_apic_write(u32 ioapic_base, u32 reg, u32 value)
+void io_apic_write(void *ioapic_base, u32 reg, u32 value)
 {
 	write32(ioapic_base, reg);
 	write32(ioapic_base + 0x10, value);
 }
 
-static int ioapic_interrupt_count(int ioapic_base)
+static int ioapic_interrupt_count(void *ioapic_base)
 {
 	/* Read the available number of interrupts. */
 	int ioapic_interrupts = (io_apic_read(ioapic_base, 0x01) >> 16) & 0xff;
@@ -48,12 +48,12 @@ static int ioapic_interrupt_count(int ioapic_base)
 	return ioapic_interrupts;
 }
 
-void clear_ioapic(u32 ioapic_base)
+void clear_ioapic(void *ioapic_base)
 {
 	u32 low, high;
 	u32 i, ioapic_interrupts;
 
-	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
+	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at %p\n", ioapic_base);
 
 	ioapic_interrupts = ioapic_interrupt_count(ioapic_base);
 
@@ -74,12 +74,12 @@ void clear_ioapic(u32 ioapic_base)
 	}
 }
 
-void set_ioapic_id(u32 ioapic_base, u8 ioapic_id)
+void set_ioapic_id(void *ioapic_base, u8 ioapic_id)
 {
 	u32 bsp_lapicid = lapicid();
 	int i;
 
-	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n",
+	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%p\n",
 	       ioapic_base);
 	printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n",
 	       bsp_lapicid);
@@ -99,7 +99,7 @@ void set_ioapic_id(u32 ioapic_base, u8 ioapic_id)
 
 }
 
-static void load_vectors(u32 ioapic_base)
+static void load_vectors(void *ioapic_base)
 {
 	u32 bsp_lapicid = lapicid();
 	u32 low, high;
@@ -146,7 +146,7 @@ static void load_vectors(u32 ioapic_base)
 	}
 }
 
-void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
+void setup_ioapic(void *ioapic_base, u8 ioapic_id)
 {
 	set_ioapic_id(ioapic_base, ioapic_id);
 	load_vectors(ioapic_base);
diff --git a/src/arch/x86/lib/pci_ops_mmconf.c b/src/arch/x86/lib/pci_ops_mmconf.c
index 4eaf2977c0..4853f6bc7e 100644
--- a/src/arch/x86/lib/pci_ops_mmconf.c
+++ b/src/arch/x86/lib/pci_ops_mmconf.c
@@ -9,46 +9,46 @@
  * Functions for accessing PCI configuration space with mmconf accesses
  */
 
-#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE)	\
-				(CONFIG_MMCONF_BASE_ADDRESS |\
-				(((SEGBUS) & 0xFFF) << 20) |\
-				(((DEVFN) & 0xFF) << 12) |\
-				((WHERE) & 0xFFF))
+#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK)	\
+				((void *)((CONFIG_MMCONF_BASE_ADDRESS |\
+					   (((SEGBUS) & 0xFFF) << 20) |\
+					   (((DEVFN) & 0xFF) << 12) |\
+					   ((WHERE) & 0xFFF)) & ~MASK))
 
 static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn,
 				       int where)
 {
-	return (read8(PCI_MMIO_ADDR(bus, devfn, where)));
+	return read8(PCI_MMIO_ADDR(bus, devfn, where, 0));
 }
 
 static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn,
 					 int where)
 {
-	return (read16(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
+	return read16(PCI_MMIO_ADDR(bus, devfn, where, 1));
 }
 
 static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn,
 					 int where)
 {
-	return (read32(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
+	return read32(PCI_MMIO_ADDR(bus, devfn, where, 3));
 }
 
 static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn,
 				     int where, uint8_t value)
 {
-	write8(PCI_MMIO_ADDR(bus, devfn, where), value);
+	write8(PCI_MMIO_ADDR(bus, devfn, where, 0), value);
 }
 
 static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn,
 				      int where, uint16_t value)
 {
-	write16(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
+	write16(PCI_MMIO_ADDR(bus, devfn, where, 1), value);
 }
 
 static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn,
 				      int where, uint32_t value)
 {
-	write32(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
+	write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value);
 }
 
 const struct pci_bus_operations pci_ops_mmconf = {