acpi_device: Add support for writing ACPI SPI descriptors

Add required definitions to describe an ACPI SPI bus and a method to
write the SpiSerialBus() descriptor to the SSDT.

This will be used by device drivers to describe their SPI resources to
the OS.  SPI devices are not currently enumerated in the devicetree but
can be enumerated by device drivers directly.

generic.c:
  void acpi_fill_ssdt_generator(struct device *dev) {
    struct acpi_spi spi = {
      .device_select = dev->path->generic.device.id,
      .device_select_polarity = SPI_POLARITY_LOW,
      .spi_wire_mode = SPI_4_WIRE_MODE,
      .speed = 1000 * 1000; /* 1 mHz */
      .data_bit_length = 8,
      .clock_phase = SPI_CLOCK_PHASE_FIRST,
      .clock_polarity = SPI_POLARITY_LOW,
      .resource = acpi_device_path(dev->bus->dev)
    };
    ...
    acpi_device_write_spi(&spi);
    ...
  }

devicetree.cb:
  device pci 1e.2 on
    chip drivers/spi/generic
      device generic 0 on end
    end
  end

SSDT.dsl:
  SpiSerialBus (0, PolarityLow, FourWireMode, 8, ControllerInitiated,
                1000000, ClockPolarityLow, ClockPhaseFirst,
                "\\_SB.PCI0.SPI0", 0, ResourceConsumer)

Change-Id: I0ef83dc111ac6c19d68872ab64e1e5e3a7756cae
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14936
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 44 insertions, 0 deletions

diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h
index 7b5001f65a..dc7f26c14b 100644
--- a/src/arch/x86/include/arch/acpi_device.h
+++ b/src/arch/x86/include/arch/acpi_device.h
@@ -164,6 +164,7 @@ void acpi_device_write_gpio(const struct acpi_gpio *gpio);
  */
 
 #define ACPI_SERIAL_BUS_TYPE_I2C	1
+#define ACPI_SERIAL_BUS_TYPE_SPI	2
 #define ACPI_SERIAL_BUS_REVISION_ID	1
 
 /*
@@ -184,4 +185,47 @@ struct acpi_i2c {
 /* Write I2cSerialBus() descriptor to SSDT AML output */
 void acpi_device_write_i2c(const struct acpi_i2c *i2c);
 
+/*
+ * ACPI SPI Bus
+ */
+
+enum spi_clock_phase {
+	SPI_CLOCK_PHASE_FIRST,
+	SPI_CLOCK_PHASE_SECOND
+};
+
+/* SPI Flags bit 0 */
+enum spi_wire_mode {
+	SPI_4_WIRE_MODE,
+	SPI_3_WIRE_MODE
+};
+
+/* SPI Flags bit 1 */
+enum spi_polarity {
+	SPI_POLARITY_LOW,
+	SPI_POLARITY_HIGH
+};
+
+struct acpi_spi {
+	/* Device selection */
+	uint16_t device_select;
+	/* Device selection line is active high or low */
+	enum spi_polarity device_select_polarity;
+	/* 3 or 4 wire SPI connection */
+	enum spi_wire_mode wire_mode;
+	/* Connection speed in HZ */
+	unsigned int speed;
+	/* Size in bits of smallest transfer unit */
+	u8 data_bit_length;
+	/* Phase of clock pulse on which to capture data */
+	enum spi_clock_phase clock_phase;
+	/* Indicate if clock is high or low during first phase */
+	enum spi_polarity clock_polarity;
+	/* Reference to SPI controller */
+	const char *resource;
+};
+
+/* Write SPI Bus descriptor to SSDT AML output */
+void acpi_device_write_spi(const struct acpi_spi *spi);
+
 #endif