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authorDuncan Laurie <dlaurie@chromium.org>2016-05-09 17:08:38 -0700
committerDuncan Laurie <dlaurie@google.com>2016-05-28 03:46:29 +0200
commitcfb6ea7e659be66c90a94841a33e69afa8163eab (patch)
tree7558b927da356296213871396cc95ec495302684 /src/arch/x86/include
parent6b7c1f605c67f18996c584970a83fc5296c94747 (diff)
acpi_device: Add support for writing ACPI GPIO descriptors
Add definitions to describe GPIOs in generated ACPI objects and a method to write a GpioIo() or GpioInt() descriptor to the SSDT. ACPI GPIOs have many possible configuration options and a structure is created to describe it accurately in ACPI terms. There are many shared descriptor fields between GpioIo() and GpioInt() so the same function can write both types. GpioInt shares many properties with ACPI Interrupts and the same types are re-used here where possible. One addition is that GpioInt can be configured to trigger on both low and high edge transitions. One descriptor can describe multiple GPIO pins (limited to 8 in this implementation) that all share configuration and controller and are used by the same device scope. Accurately referring to the GPIO controller that this pin is connected to requires the SoC/board to implement a function handler for acpi_gpio_path(), or for the caller to provide this directly as a string in the acpi_gpio->reference variable. This will get used by device drivers to describe their resources in the SSDT. Here is a sample for a Maxim 98357A I2S codec which has a GPIO for power and channel selection called "sdmode". chip.h: struct drivers_generic_max98357a_config { struct acpi_gpio sdmode_gpio; }; max98357a.c: void acpi_fill_ssdt_generator(struct device *dev) { struct drivers_generic_max98357a_config *config = dev->chip_info; ... acpi_device_write_gpio(&config->sdmode_gpio); ... } devicetree.cb: device pci 1f.3 on chip drivers/generic/max98357a register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPP_C5)" device generic 0 on end end end SSDT.dsl: GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, ,) { 53 } Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Ibf5bab9c4bf6f21252373fb013e78f872550b167 Reviewed-on: https://review.coreboot.org/14934 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/acpi_device.h75
1 files changed, 75 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h
index 60f7e00606..a81cee0087 100644
--- a/src/arch/x86/include/arch/acpi_device.h
+++ b/src/arch/x86/include/arch/acpi_device.h
@@ -16,8 +16,11 @@
#ifndef __ACPI_DEVICE_H
#define __ACPI_DEVICE_H
+#include <stdint.h>
+
#define ACPI_DESCRIPTOR_LARGE (1 << 7)
#define ACPI_DESCRIPTOR_INTERRUPT (ACPI_DESCRIPTOR_LARGE | 9)
+#define ACPI_DESCRIPTOR_GPIO (ACPI_DESCRIPTOR_LARGE | 12)
struct device;
const char *acpi_device_name(struct device *dev);
@@ -82,4 +85,76 @@ struct acpi_irq {
/* Write extended Interrupt() descriptor to SSDT AML output */
void acpi_device_write_interrupt(const struct acpi_irq *irq);
+/*
+ * ACPI Descriptors for GpioIo() and GpioInterrupt()
+ */
+
+enum acpi_gpio_type {
+ ACPI_GPIO_TYPE_INTERRUPT,
+ ACPI_GPIO_TYPE_IO
+};
+
+enum acpi_gpio_pull {
+ ACPI_GPIO_PULL_DEFAULT,
+ ACPI_GPIO_PULL_UP,
+ ACPI_GPIO_PULL_DOWN,
+ ACPI_GPIO_PULL_NONE
+};
+
+enum acpi_gpio_io_restrict {
+ ACPI_GPIO_IO_RESTRICT_NONE,
+ ACPI_GPIO_IO_RESTRICT_INPUT,
+ ACPI_GPIO_IO_RESTRICT_OUTPUT,
+ ACPI_GPIO_IO_RESTRICT_PRESERVE
+};
+
+#define ACPI_GPIO_REVISION_ID 1
+#define ACPI_GPIO_MAX_PINS 8
+
+struct acpi_gpio {
+ int pin_count;
+ uint16_t pins[ACPI_GPIO_MAX_PINS];
+
+ enum acpi_gpio_type type;
+ enum acpi_gpio_pull pull;
+ const char *resource;
+
+ /* GpioInt */
+ uint16_t interrupt_debounce_timeout; /* 1/100 ms */
+ struct acpi_irq irq;
+
+ /* GpioIo */
+ uint16_t output_drive_strength; /* 1/100 mA */
+ int io_shared;
+ enum acpi_gpio_io_restrict io_restrict;
+};
+
+/* Basic output GPIO with default pull settings */
+#define ACPI_GPIO_OUTPUT(gpio) { \
+ .type = ACPI_GPIO_TYPE_IO, \
+ .pull = ACPI_GPIO_PULL_DEFAULT, \
+ .io_restrict = ACPI_GPIO_IO_RESTRICT_OUTPUT, \
+ .pin_count = 1, \
+ .pins = { (gpio) } }
+
+/* Basic input GPIO with default pull settings */
+#define ACPI_GPIO_INPUT(gpio) { \
+ .type = ACPI_GPIO_TYPE_IO, \
+ .pull = ACPI_GPIO_PULL_DEFAULT, \
+ .io_restrict = ACPI_GPIO_IO_RESTRICT_INPUT, \
+ .pin_count = 1, \
+ .pins = { (gpio) } }
+
+/* Basic interrupt GPIO with default pull settings */
+#define ACPI_GPIO_INTERRUPT(gpio,mode,polarity) { \
+ .type = ACPI_GPIO_TYPE_INTERRUPT, \
+ .pull = ACPI_GPIO_PULL_DEFAULT, \
+ .irq.mode = (mode), \
+ .irq.polarity = (polarity), \
+ .pin_count = 1, \
+ .pins = { (gpio) } }
+
+/* Write GpioIo() or GpioInt() descriptor to SSDT AML output */
+void acpi_device_write_gpio(const struct acpi_gpio *gpio);
+
#endif