diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-12 18:51:04 +0100 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-29 19:58:13 +0000 |
commit | cc22607dbfbab0c9ce42c071b5b3c4a304845313 (patch) | |
tree | 529d9b50ba52c291f72a5c6eb6df2459a5b61a93 /src/arch/x86/include | |
parent | aab91213b2189472cc3f0e6bc11bf60e76902771 (diff) |
Revert "src/arch/x86: Use core apic id to get cpu_index()"
This reverts commit 095c931cf12924da9011b47aa64f4a6f11d89f13.
Previously cpu_info() was implemented with a struct on top of an
aligned stack. As FSP changed the stack value cpu_info() could not be
used in FSP context (which PPI is). Now cpu_info() uses GDT segments,
which FSP does not touch so it can be used.
This also exports cpu_infos from cpu.c as it's a convenient way to get
the struct device * for a certain index.
TESTED on aldrvp: FSP-S works and is able to run code on APs.
Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69509
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r-- | src/arch/x86/include/arch/cpu.h | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index c7c6b4e074..18bc961828 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -161,6 +161,13 @@ static inline struct cpu_info *cpu_info(void) return ci; } +static inline unsigned long cpu_index(void) +{ + struct cpu_info *ci; + ci = cpu_info(); + return ci->index; +} + struct cpuinfo_x86 { uint8_t x86; /* CPU family */ uint8_t x86_vendor; /* CPU vendor */ @@ -212,20 +219,6 @@ uint32_t cpu_get_feature_flags_ecx(void); */ uint32_t cpu_get_feature_flags_edx(void); -/* - * Previously cpu_index() implementation assumes that cpu_index() - * function will always getting called from coreboot context - * (ESP stack pointer will always refer to coreboot). - * - * But with MP_SERVICES_PPI implementation in coreboot this - * assumption might not be true, where FSP context (stack pointer refers - * to FSP) will request to get cpu_index(). - * - * Hence new logic to use cpuid to fetch lapic id and matches with - * cpus_default_apic_id[] variable to return correct cpu_index(). - */ -int cpu_index(void); - #define DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA 0x04 #define DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD 0x8000001d |