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authorStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-27 21:49:28 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-30 23:06:08 +0200
commit39205c67027a0753370dad80f67c1f2ebf4bf459 (patch)
tree202a470288f722d22ad819a45eb4a0adf9b5f2cb /src/arch/x86/include
parent4cc8c70c3297a99449ca731a7ea34d3fbe32d614 (diff)
acpigen: Add support for generating T state tables
Change-Id: I58050591198bb06de5f0ca58ca3a02f1cfa95069 Signed-off-by: Duncan Laurie <dlaurie@google.com> Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/944 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/acpi.h8
-rw-r--r--src/arch/x86/include/arch/acpigen.h4
2 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 913ea5872a..38029edfb7 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -418,6 +418,14 @@ typedef struct acpi_cstate {
acpi_addr_t resource;
} __attribute__ ((packed)) acpi_cstate_t;
+typedef struct acpi_tstate {
+ u32 percent;
+ u32 power;
+ u32 latency;
+ u32 control;
+ u32 status;
+} __attribute__ ((packed)) acpi_tstate_t;
+
/* These are implemented by the target port or north/southbridge. */
unsigned long write_acpi_tables(unsigned long addr);
unsigned long acpi_fill_madt(unsigned long current);
diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h
index ea8cba7dd7..ae8aaf73c9 100644
--- a/src/arch/x86/include/arch/acpigen.h
+++ b/src/arch/x86/include/arch/acpigen.h
@@ -43,12 +43,16 @@ int acpigen_write_name_byte(const char *name, uint8_t val);
int acpigen_write_scope(const char *name);
int acpigen_write_PPC(u8 nr);
int acpigen_write_empty_PCT(void);
+int acpigen_write_empty_PTC(void);
+int acpigen_write_TPC(const char *gnvs_tpc_limit);
int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat,
u32 control, u32 status);
typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord;
int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
int acpigen_write_CST_package(acpi_cstate_t *entry, int nentries);
int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len);
+int acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list);
+int acpigen_write_TSD_package(u32 domain, u32 numprocs, PSD_coord coordtype);
int acpigen_write_mem32fixed(int readwrite, u32 base, u32 size);
int acpigen_write_io16(u16 min, u16 max, u8 align, u8 len, u8 decode16);
int acpigen_write_register(acpi_addr_t *addr);