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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-08-28 20:48:17 -0500
committerMartin Roth <martinroth@google.com>2016-01-07 16:52:31 +0100
commitc764c7488b2cb536bc4e09e6a8a639beeabfddeb (patch)
tree8f63f9a4386a83ac1f5269f005c1e4394a94c75a /src/arch/x86/include
parent046d2174207d79681fe98206ce92074ac610957e (diff)
cpu/amd/microcode: Introduce CBFS access spinlock to avoid IOMMU failure
When microcode updates are enabled, this fixes an issue identical to that described in GIT hash 7b22d84d: * drivers/pc80: Add optional spinlock for nvram CBFS access Change-Id: Ib7e8cb171f44833167053ca98a85cca23021dfba Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12063 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/x86/include')
-rw-r--r--src/arch/x86/include/arch/smp/spinlock.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h
index 057d9e3f8f..39a81d289c 100644
--- a/src/arch/x86/include/arch/smp/spinlock.h
+++ b/src/arch/x86/include/arch/smp/spinlock.h
@@ -1,7 +1,10 @@
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
-#if !defined(__PRE_RAM__) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK)
+#if !defined(__PRE_RAM__) \
+ || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \
+ || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK) \
+ || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK)
/*
* Your basic SMP spinlocks, allowing only a single CPU anywhere
@@ -16,6 +19,8 @@ spinlock_t *romstage_console_lock(void);
void initialize_romstage_console_lock(void);
spinlock_t* romstage_nvram_cbfs_lock(void);
void initialize_romstage_nvram_cbfs_lock(void);
+spinlock_t* romstage_microcode_cbfs_lock(void);
+void initialize_romstage_microcode_cbfs_lock(void);
#endif
#define SPIN_LOCK_UNLOCKED (spinlock_t) { 1 }