diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-09-04 12:06:05 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-09-09 19:35:12 +0000 |
| commit | 14714e1303a420f9e0bf0bb5bba2efaae2c52efb (patch) | |
| tree | c26b86718fb5de9ef1e2194071f640f51e0a1149 /src/arch/x86/include | |
| parent | b2a62622ba030162784c31865a4fcba0c03408c7 (diff) | |
x86: link romstage like the other architectures
All the other architectures are using the memlayout
for linking romstage. Use that same method on x86
as well for consistency.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built a myriad of boards. Analyzed readelf output.
Change-Id: I016666c4b01410df112e588c2949e3fc64540c2e
Signed-off-by: Aaron Durbin <adubin@chromium.org>
Reviewed-on: http://review.coreboot.org/11510
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/arch/x86/include')
| -rw-r--r-- | src/arch/x86/include/arch/header.ld | 6 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/memlayout.h | 8 |
2 files changed, 13 insertions, 1 deletions
diff --git a/src/arch/x86/include/arch/header.ld b/src/arch/x86/include/arch/header.ld index dd6cb271fa..55547adcd4 100644 --- a/src/arch/x86/include/arch/header.ld +++ b/src/arch/x86/include/arch/header.ld @@ -17,9 +17,15 @@ * Foundation, Inc. */ +#include <rules.h> + PHDRS { to_load PT_LOAD; } +#if ENV_RAMSTAGE ENTRY(_start) +#elif ENV_ROMSTAGE +ENTRY(protected_start) +#endif diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h index 54b8b4a308..91cfc8e064 100644 --- a/src/arch/x86/include/arch/memlayout.h +++ b/src/arch/x86/include/arch/memlayout.h @@ -20,6 +20,12 @@ #ifndef __ARCH_MEMLAYOUT_H #define __ARCH_MEMLAYOUT_H -/* Currently empty to satisfy common arch requirements. */ +#include <rules.h> + +#if ENV_ROMSTAGE +/* No .data or .bss in romstage. Cache as ram is handled separately. */ +#define ARCH_STAGE_HAS_DATA_SECTION 0 +#define ARCH_STAGE_HAS_BSS_SECTION 0 +#endif #endif /* __ARCH_MEMLAYOUT_H */ |