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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-24 08:09:40 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-27 13:50:39 +0200 |
| commit | 5f4b4c42964445d1bc517c461090f17655e84131 (patch) | |
| tree | 30361070840ded66d75a52e6e1362c45b66979db /src/arch/x86/exit_car.S | |
| parent | ae738acdc5f02d232e035538c67d63ba19b9ccaa (diff) | |
arch/x86: Add bootblock and postcar support for SOC MTRR access
Quark does not support the rdmsr and wrmsr instructions. Use SOC
specific routines to configure the MTRRs on Quark based platforms.
Add cpu_common.c as a build dependency to provide access to the routine
cpu_phys_address_size.
TEST=Build and run on Galileo Gen2
Change-Id: I43b7067c66c5c55b42097937e862078adf17fb19
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15846
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/exit_car.S')
| -rw-r--r-- | src/arch/x86/exit_car.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index e04bd04b25..a51d662e14 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -54,6 +54,14 @@ _start: * 0x00: Number of variable MTRRs to clear */ +#if IS_ENABLED(CONFIG_SOC_SETS_MSRS) + push %esp + call soc_set_mtrrs + + /* eax: new top_of_stack with setup_stack_and_mtrrs data removed */ + movl %eax, %esp + call soc_enable_mtrrs +#else /* CONFIG_SOC_SETS_MSRS */ /* Clear variable MTRRs. */ pop %ebx /* Number to clear */ test %ebx, %ebx @@ -98,6 +106,7 @@ _start: and $(~(MTRR_DEF_TYPE_MASK)), %eax or $(MTRR_DEF_TYPE_EN), %eax wrmsr +#endif /* CONFIG_SOC_SETS_MSRS */ /* Load and run ramstage. */ call copy_and_run |