diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-09-16 16:15:14 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-09-19 17:01:55 +0200 |
| commit | 6b0cebccc4cfb99bb20f163de0f83af0c143c35a (patch) | |
| tree | 2c4a34d0ec421c18c0a35ab4ab182e36074d53c1 /src/arch/x86/exit_car.S | |
| parent | c701393e207cd09c6ce232960c7c647bef27055f (diff) | |
arch/x86: move postcar main logic into C
The console_init(), MTRR printing, and loading ramstage
logic was previously all in assembly. Move that logic
into C code so that future features can more easily be
added into the postcar boot flow.
BUG=chrome-os-partner:57513
Change-Id: I332140f569caf0803570fd635d894295de8c0018
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16618
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/arch/x86/exit_car.S')
| -rw-r--r-- | src/arch/x86/exit_car.S | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index ca9b70e663..5c62c92af8 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -26,11 +26,6 @@ stack_top: .text .global _start _start: -#if IS_ENABLED(CONFIG_POSTCAR_CONSOLE) - /* Enable the console */ - call console_init -#endif /* CONFIG_POSTCAR_CONSOLE */ - /* chipset_teardown_car() is expected to disable cache-as-ram. */ call chipset_teardown_car @@ -113,13 +108,8 @@ _start: wrmsr #endif /* CONFIG_SOC_SETS_MSRS */ - /* Display the MTRRs */ -#if IS_ENABLED(CONFIG_POSTCAR_CONSOLE) - call soc_display_mtrrs -#endif /* CONFIG_POSTCAR_CONSOLE */ - - /* Load and run ramstage. */ - call copy_and_run + /* Call into main for postcar. */ + call main /* Should never return. */ 1: jmp 1b |