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authorLee Leahy <leroy.p.leahy@intel.com>2017-03-16 11:24:09 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-17 03:12:39 +0100
commit9c7c6f7213decfc0d0fee4bbc911a291ee93bcdb (patch)
treed9e23ea1f89f75c6e178734bbe375860515bf3e2 /src/arch/x86/exception.c
parentd94cff6ab26d482554309041a9317cc3bf5e4b02 (diff)
arch/x86: Fix issues with braces detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl: ERROR: open brace '{' following function declarations go on the next line ERROR: that open brace { should be on the previous line ERROR: else should follow close brace '}' WARNING: braces {} are not necessary for any arm of this statement WARNING: braces {} are not necessary for single statement blocks TEST=Build and run on Galileo Gen2 Change-Id: I13d1967757e106c8300a15baed25d920c52a1a95 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18861 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/exception.c')
-rw-r--r--src/arch/x86/exception.c28
1 files changed, 9 insertions, 19 deletions
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 84328be2c1..1d83a00eb7 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -187,8 +187,7 @@ static uint32_t gdb_stub_registers[NUM_REGS];
-static unsigned char exception_to_signal[] =
-{
+static unsigned char exception_to_signal[] = {
[0] = GDB_SIGFPE, /* divide by zero */
[1] = GDB_SIGTRAP, /* debug exception */
[2] = GDB_SIGSEGV, /* NMI Interrupt */
@@ -342,8 +341,7 @@ static int get_packet(char *buffer)
if (checksum != xmitcsum) {
stub_putc('-'); /* failed checksum */
stub_flush();
- }
- else {
+ } else {
stub_putc('+'); /* successful transfer */
stub_flush();
}
@@ -394,9 +392,8 @@ void x86_exception(struct eregs *info)
gdb_stub_registers[CS] = info->cs;
gdb_stub_registers[PS] = info->eflags;
signo = GDB_UNKNOWN;
- if (info->vector < ARRAY_SIZE(exception_to_signal)) {
+ if (info->vector < ARRAY_SIZE(exception_to_signal))
signo = exception_to_signal[info->vector];
- }
/* reply to the host that an exception has occurred */
out_buffer[0] = 'S';
@@ -410,9 +407,8 @@ void x86_exception(struct eregs *info)
char *ptr;
out_buffer[0] = '\0';
out_buffer[1] = '\0';
- if (!get_packet(in_buffer)) {
+ if (!get_packet(in_buffer))
break;
- }
switch(in_buffer[0]) {
case '?': /* last signal */
out_buffer[0] = 'S';
@@ -438,9 +434,8 @@ void x86_exception(struct eregs *info)
(*ptr++ == ',') &&
parse_ulong(&ptr, &length)) {
copy_to_hex(out_buffer, (void *)addr, length);
- } else {
+ } else
memcpy(out_buffer, "E01", 4);
- }
break;
case 'M':
/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
@@ -451,26 +446,22 @@ void x86_exception(struct eregs *info)
(*(ptr++) == ':')) {
copy_from_hex((void *)addr, ptr, length);
memcpy(out_buffer, "OK", 3);
- }
- else {
+ } else
memcpy(out_buffer, "E02", 4);
- }
break;
case 's':
case 'c':
/* cAA..AA Continue at address AA..AA(optional) */
/* sAA..AA Step one instruction from AA..AA(optional) */
ptr = &in_buffer[1];
- if (parse_ulong(&ptr, &addr)) {
+ if (parse_ulong(&ptr, &addr))
info->eip = addr;
- }
/* Clear the trace bit */
info->eflags &= ~(1 << 8);
/* Set the trace bit if we are single stepping */
- if (in_buffer[0] == 's') {
+ if (in_buffer[0] == 's')
info->eflags |= (1 << 8);
- }
return;
break;
case 'D':
@@ -513,8 +504,7 @@ void x86_exception(struct eregs *info)
* evident from the looking at the dump */
code = (u8*)((uintptr_t)code & ~0x7);
int i;
- for (i = 0; i < MDUMP_SIZE; i++)
- {
+ for (i = 0; i < MDUMP_SIZE; i++) {
if ( (i & 0x07) == 0 )
printk(BIOS_EMERG, "\n%p:\t", code + i);
printk(BIOS_EMERG, "%.2x ", code[i]);