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authorArthur Heymans <arthur@aheymans.xyz>2017-11-04 07:52:23 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-04-17 10:40:36 +0000
commit1994e448be8e843716173dc7149c8644cfd9ebc5 (patch)
treec0369f887312ca4575649617f936a298424b81cc /src/arch/x86/exception.c
parent0bf87de667f22399f7a0b110ce29222f3aba5484 (diff)
nb/intel/x4x: Clarify the raminit memory mapping
This replaces magic values by macros and adds some comments to improve readability. Adds a convenient function to fetch the test address of a rank. Also fixes the temporary memory map by changing a write to MCHBAR 0x100 to 0x110, since this is what vendor does. (No difference observed thus far) TESTED on DG43GT Change-Id: I58923e4a8a756f4ae65f759e7d46e03fad39fab7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/arch/x86/exception.c')
0 files changed, 0 insertions, 0 deletions