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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-04-21 10:29:17 +0300
committerHung-Te Lin <hungte@chromium.org>2020-12-14 08:24:25 +0000
commitcfe526dce2b76cce3b4d1009bad676e2ec21afab (patch)
treebc050cc2b8347c128d8e37a8bb314acaa0d992a2 /src/arch/x86/bootblock.ld
parentc2d6f5f4da3c89b3f432f05fb31879b8d4d50698 (diff)
arch/x86: Combine bootblock linker scripts
Packing bootblock sections is somewhat easier to understand when these all appear in one .ld file. Change-Id: Ie8629a89fa47a28db63ecc33c631b29ac5a77448 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/arch/x86/bootblock.ld')
-rw-r--r--src/arch/x86/bootblock.ld34
1 files changed, 34 insertions, 0 deletions
diff --git a/src/arch/x86/bootblock.ld b/src/arch/x86/bootblock.ld
new file mode 100644
index 0000000000..12f932c2dc
--- /dev/null
+++ b/src/arch/x86/bootblock.ld
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+gdtptr16_offset = gdtptr16 & 0xffff;
+nullidt_offset = nullidt & 0xffff;
+
+/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
+ * Startup IPI message without RAM.
+ */
+#if CONFIG(SIPI_VECTOR_IN_ROM)
+_bogus = ASSERT((_start16bit & 0xfff) == 0, "Symbol _start16bit is not at 4 KiB boundary");
+ap_sipi_vector_in_rom = (_start16bit >> 12) & 0xff;
+#endif
+
+SECTIONS {
+ /* Trigger an error if I have an unusable start address */
+ _bogus = ASSERT(_start16bit >= 0xffff0000, "_start16bit too low. Please report.");
+
+ . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1;
+ .id (.): {
+ KEEP(*(.id));
+ }
+
+ . = 0xffffffc0;
+ .fit_pointer (.): {
+ KEEP(*(.fit_pointer));
+ }
+
+ . = 0xfffffff0;
+ .reset . : {
+ *(.reset);
+ . = 15;
+ BYTE(0x00);
+ }
+}