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authorzbao <fishbaozi@gmail.com>2012-04-13 13:42:15 +0800
committerMarc Jones <marcj303@gmail.com>2012-04-16 18:22:47 +0200
commitf72237346d9a0894b4675f0b6915da6fdcccd31e (patch)
tree3ccf4333bd94f38a68f3b76d3f161d27072316b5 /src/arch/x86/boot
parentcaf494c83170e97b192e2174bc461482699a3712 (diff)
S3 code in coreboot public folder.
1. Move the Stack to high memory. 2. Restore the MTRR before Coreboot jump to the wakeup vector. Change-Id: I9872e02fcd7eed98e7f630aa29ece810ac32d55a Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/623 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/arch/x86/boot')
-rw-r--r--src/arch/x86/boot/tables.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index b7dc4fe8cc..70f3117cb5 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -237,6 +237,7 @@ struct lb_memory *write_tables(void)
* the result right now. If it fails, ACPI resume will be disabled.
*/
cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
+ cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE);
#endif
#if CONFIG_MULTIBOOT