summaryrefslogtreecommitdiff
path: root/src/arch/x86/boot
diff options
context:
space:
mode:
authorDuncan Laurie <dlaurie@chromium.org>2012-08-13 09:37:42 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-11-12 04:21:59 +0100
commit04c5bae39054aedbff1865d9dd2633260c23ece3 (patch)
tree21eb979f2c2341143be67decbcd25443108b6c27 /src/arch/x86/boot
parent2c485180a8613695b4886299efca4276fd17be31 (diff)
Define post codes for OS boot and resume
And move the pre-hardwaremain post code to 0x79 so it comes before hardwaremain at 0x80. Emit these codes from ACPI OS resume vector as well as the finalize step in bd82x6x southbridge. Change-Id: I7f258998a2f6549016e99b67bc21f7c59d2bcf9e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1702 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/x86/boot')
-rw-r--r--src/arch/x86/boot/acpi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c
index 72b6d96576..ca2f1d4562 100644
--- a/src/arch/x86/boot/acpi.c
+++ b/src/arch/x86/boot/acpi.c
@@ -630,6 +630,7 @@ void suspend_resume(void)
/* Call mainboard resume handler first, if defined. */
if (mainboard_suspend_resume)
mainboard_suspend_resume();
+ post_code(POST_OS_RESUME);
acpi_jump_to_wakeup(wake_vec);
}
}