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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-28 16:05:08 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-19 03:25:05 +0000 |
| commit | 1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b (patch) | |
| tree | 096daea96736744fef239ec85a766777647119d8 /src/arch/x86/assembly_entry.S | |
| parent | 4f66cb9b2867bcdeb47df9fe76e8893d53f85fb8 (diff) | |
Drop ROMCC code and header guards
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/arch/x86/assembly_entry.S')
| -rw-r--r-- | src/arch/x86/assembly_entry.S | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S index 9d6f5a42b4..fef5ce9240 100644 --- a/src/arch/x86/assembly_entry.S +++ b/src/arch/x86/assembly_entry.S @@ -13,8 +13,6 @@ #include <rules.h> -#if !CONFIG(ROMCC_BOOTBLOCK) - /* * This path is for stages that are post bootblock. The gdt is reloaded * to accommodate platforms that are executing out of CAR. In order to @@ -60,26 +58,3 @@ debug_spinloop: /* Expect to never return. */ 1: jmp 1b - -#else - -/* This file assembles the start of the romstage program by the order of the - * includes. Thus, it's extremely important that one pays very careful - * attention to the order of the includes. */ - -#include <arch/x86/prologue.inc> -#include <cpu/x86/32bit/entry32.inc> -#include <cpu/x86/fpu_enable.inc> -#if CONFIG(SSE) -#include <cpu/x86/sse_enable.inc> -#endif - -/* - * The assembly.inc is generated based on the requirements of the mainboard. - * For example, for ROMCC boards the MAINBOARDDIR/romstage.c would be - * processed by ROMCC and added. In non-ROMCC boards the chipsets' - * cache-as-ram setup files would be here. - */ -#include <generated/assembly.inc> - -#endif |