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authorV Sowmya <v.sowmya@intel.com>2021-06-21 08:47:17 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-07-05 10:47:17 +0000
commit418d37e68956b13ea4e8abff8bf6ed30c0059bcd (patch)
treeaea55239fd0c9273a0af0d91a2a34cf074473ebd /src/arch/x86/acpi/globutil.asl
parent912a2353d244eae35ab39c80e8bb6d52ee5d5967 (diff)
soc/intel/alderlake: Add support to update the FIVR configs
This patch adds the supports to update the optimal FIVR configurations for external voltage rails via devicetree. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: Icf6c74bda5a167abf63938ebed6affc6b31c76f5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55702 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86/acpi/globutil.asl')
0 files changed, 0 insertions, 0 deletions