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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-04-06 04:03:50 +0300
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-04-06 04:57:04 +0200
commitf8c7c2396eb843b17fd32d19bd9e481e088cee57 (patch)
tree4b1bd330bd546102a10b27f951742b5821f61d45 /src/arch/x86/Kconfig
parent334532eeffac3a26ffbd25bdf4808b87cad2a208 (diff)
Fix support for RAM-less multi-processor init
Fix regression after commit: 7dfe32c5408916b6cb23f1ec48e473e1c728d300 Only align 16-bit entry on platforms that really require it, indicated by selecting SIPI_VECTOR_IN_ROM in CPU Kconfig. Disable assertion test of AP_SIPI_VECTOR for platforms not depending on this feature. Build of romstage should be fixed to get the vector address from bootblock build automatically. Change-Id: Ide470833c0254df1a9ff708369ab1c095ccfb98d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/875 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/x86/Kconfig')
-rw-r--r--src/arch/x86/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index f49d09b872..6d56ec6bfc 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -8,6 +8,13 @@ config AP_IN_SIPI_WAIT
default n
depends on ARCH_X86
+# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
+# can boot AP CPUs to enable their shared caches.
+config SIPI_VECTOR_IN_ROM
+ bool
+ default n
+ depends on ARCH_X86
+
config RAMBASE
hex
default 0x100000