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authorMartin Roth <martinroth@chromium.org>2019-04-22 16:26:23 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-26 22:53:07 +0000
commit8418fd418c8fcef5ca59109be33dececee9cda29 (patch)
treecf2d23e031055ce05cfa4c7b4c12461ffc707108 /src/arch/x86/Kconfig
parenta165c07ed7ffdfc0d64eadb911a1cf576b26b0f0 (diff)
x86: Introduce RESET_VECTOR_IN_RAM option
Create a new Kconfig symbol that allows an x86 device to begin execution when its reset vector is in DRAM and not at the traditional 0xfffffff0. The implementation will follow later, this is just to setup various ENV_xxx definitions correctly for the build environment. Change-Id: I098ecf8bf200550db1e15f178f7661c1ac516dc5 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/x86/Kconfig')
-rw-r--r--src/arch/x86/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 2ace7f753d..a7d10fb502 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -81,6 +81,13 @@ config AP_IN_SIPI_WAIT
default n
depends on ARCH_X86 && SMP
+config RESET_VECTOR_IN_RAM
+ bool
+ depends on ARCH_X86
+ help
+ Select this option if the x86 soc implements custom code to handle the
+ reset vector in RAM instead of the traditional 0xfffffff0 location.
+
# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
# can boot AP CPUs to enable their shared caches.
config SIPI_VECTOR_IN_ROM