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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-17 12:12:42 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-11-30 16:37:30 +0000 |
| commit | b24f48db7dcc3baa580fa547c6b7b717ae718228 (patch) | |
| tree | d7491bbf4710fc8f37e3875d557ace2deefc8796 /src/arch/riscv | |
| parent | fa2feae3d6e537cdc9d18d5128ae8fae7d17e487 (diff) | |
arch/arm/armv7: Disable generating neon FPU code
By default clang generates code with neon instructions. These are not
supported on all arm targets so default to fpu=none.
Change-Id: I48fc505107d131466be39f466151df62b2d2bd0b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69745
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions