diff options
| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-10-12 00:18:00 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-10-15 00:24:46 +0200 |
| commit | 2af174a7dc8fc85f142a895ab3240a83265f7e27 (patch) | |
| tree | c8ffe4b1a48e1d86f976887d16eb2b716c77f961 /src/arch/riscv | |
| parent | 03bf301d825ff0e360be67b4839bdb11f2f61774 (diff) | |
riscv and power8: Convert printk/while(1) to die
Change-Id: I277cc9ae22cd33f2cd9ded808960349d09e8670d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16984
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/trap_handler.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 8120b66c06..f52ccf7e12 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -193,8 +193,7 @@ void handle_misaligned_load(trapframe *tf) { tf->gpr[destRegister] = value; } else { // panic, this should not have happened - printk(BIOS_DEBUG, "Code should not reach this path, misaligned on a non-64 bit store/load\n"); - while(1); + die("Code should not reach this path, misaligned on a non-64 bit store/load\n"); } // return to where we came from @@ -223,8 +222,7 @@ void handle_misaligned_store(trapframe *tf) { } } else { // panic, this should not have happened - printk(BIOS_DEBUG, "Code should not reach this path, misaligned on a non-64 bit store/load\n"); - while(1); + die("Code should not reach this path, misaligned on a non-64 bit store/load\n"); } // return to where we came from |