diff options
| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-10-12 00:18:02 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-10-18 18:42:11 +0200 |
| commit | 0bc12abc2b26c0b4098ac76a6d42219b359c7a22 (patch) | |
| tree | 317bd021afea062a381a7b2b484974e6d657caf0 /src/arch/riscv | |
| parent | 96aff03dcd3a60a0c85abf92d2a8578f05600606 (diff) | |
arch/riscv: In trap handler, don't print SP twice
The stack pointer (SP) is already printed in print_trap_information.
Don't print it again in handle_misaligned_{load,store}.
Change-Id: I156cf5734a16605decc2280e54e6db3089e094a2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16996
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/trap_handler.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 59aa2214bc..ad4992803c 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -173,7 +173,6 @@ static uint32_t fetch_instruction(uintptr_t vaddr) { void handle_misaligned_load(trapframe *tf) { printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf); - printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]); uintptr_t faultingInstructionAddr = tf->epc; insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr); printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction); @@ -203,7 +202,6 @@ void handle_misaligned_load(trapframe *tf) { void handle_misaligned_store(trapframe *tf) { printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf); - printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]); uintptr_t faultingInstructionAddr = tf->epc; insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr); printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction); |