arch/riscv: Remove enter_supervisor

This function is unused since coreboot starts payloads in machine mode,
and it uses the obsolete eret instruction.

Change-Id: I98d7d0de5a3959821c21a0ba4319efb610fdefde
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15729
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2 files changed, 0 insertions, 6 deletions

diff --git a/src/arch/riscv/include/vm.h b/src/arch/riscv/include/vm.h
index f9ffc407da..5bf03c796e 100644
--- a/src/arch/riscv/include/vm.h
+++ b/src/arch/riscv/include/vm.h
@@ -57,7 +57,6 @@
 typedef uintptr_t pte_t;
 extern pte_t* root_page_table;
 
-void enter_supervisor(void);
 void initVirtualMemory(void);
 
 size_t pte_ppn(pte_t pte);
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index 64ea2b12ac..a7a81fbab5 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -29,11 +29,6 @@ void walk_page_table(void) {
 	printk(BIOS_DEBUG, "root_page_table: %p\n", t);
 }
 
-void enter_supervisor(void) {
-	// enter supervisor mode
-	asm volatile("la t0, 1f; csrw mepc, t0; eret; 1:" ::: "t0");
-}
-
 void flush_tlb(void)
 {
 	asm volatile("sfence.vm");