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| author | Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> | 2020-06-19 19:09:51 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-25 11:53:12 +0000 |
| commit | eba0433b1707904507bd62cf547450d9e2fd203e (patch) | |
| tree | 18287d5f40e90eeaadc6712d452f6b5cf7c4d4e8 /src/arch/riscv | |
| parent | 2ef3b2df1f562610219444d913224d0600c097a1 (diff) | |
mb/google/octopus/variants/bobba: fix disable_xhci_lfps_pm by sku
due to overridetree.cb set disable_xhci_lfps_pm = 0,
need correct condition expression to let function work.
BUG=b:146768983
BRANCH=octopus
TEST=build coreboot with DisableXhciLfpsPM being set to 1 and flash
the image to the device. Run following command to check if
bits[7:4] is set 0:
>iotools mmio_read32 "XHCI MMIO BAR + 0x80A4"
Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I53621d7674a531adfa40e8703cb2cd01c50376b8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42564
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Marco Chen <marcochen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions