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| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-29 18:49:18 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-01 09:05:34 +0000 |
| commit | b8a82496fe587f6f619a8efb4e091de9ffc63a9e (patch) | |
| tree | f4ab32e6a6feeabda1b9fefe790c6518211d8982 /src/arch/riscv | |
| parent | 39a84879f5c2c220e91cd7e69587d76cb3438cc0 (diff) | |
soc/intel/broadwell/gma.c: Add missing `break` in switch
Otherwise, the `GT_CDCLK_675` case falls through and exits early.
Change-Id: Icb979f8a980e1a1e1c712c5d9bc8d94c90376b7f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50141
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions