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author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-10-23 22:28:26 -0500 |
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committer | Peter Stuge <peter@stuge.se> | 2015-10-25 05:05:46 +0100 |
commit | ee3ec8e21256e544ef0a32f283a65c0c47040948 (patch) | |
tree | e15929b289e4a4e9876f217223cf7e53415285e3 /src/arch/riscv | |
parent | 2a16acee6b5fe7c8007f29e6015e0eef443a9344 (diff) |
southbridge/amd/sb700: Set up uninitialized devices in early boot
LPC decodes were not enabled, leading to a failure of POST 80 cards
and similar debugging devices. Enable the relevant LPC decodes
to allow debugging.
Additionally, the SMBUS controllers were not properly set up.
Enable both the primary and auxiliary controllers.
Finally, K10 and higher CPUs were hanging during boot due to
a misconfigued IOAPIC. Properly configure the IOAPIC.
Change-Id: I9ffb6542ce445ac971fb81f4f554e7f1313e6a98
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12177
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions