summaryrefslogtreecommitdiff
path: root/src/arch/riscv
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-01-07 15:30:21 +0100
committerNico Huber <nico.h@gmx.de>2019-01-08 14:27:43 +0000
commitd25109905aa46fce557d2905a43c347ca5be1aa0 (patch)
treed4eca1b950e3f394a3b58a6a02bcd26a25b1be18 /src/arch/riscv
parent458297c8ba237808a3cdf698f9c7c561b13c0b6c (diff)
mb/{ga-g41m-es2l,d945gclf,rk886ex}: Fix devicetree
The devicetree was synced incorrectly with respect to the function disable register set in romstage. Change-Id: I189c5fdc433b5577ae008abf42878cdc6e3f2d52 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30711 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions