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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2016-07-18 17:56:59 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2016-07-18 22:50:33 +0200 |
| commit | b8e67acc919cff0494607dbd470257d2651cb8e8 (patch) | |
| tree | 2ce133a578c11aa72bb6a727e44ced5f8dd555f4 /src/arch/riscv/virtual_memory.c | |
| parent | 5d687add8531e3849189959e68a812a14fa01c0c (diff) | |
arch/riscv: Change all eret instructions to .word 0x30200073 (mret)
Using the opcode directly is necessary for the transition to the GCC
6.1.0 based toolchain, because the old toolchain only supports eret and
the new toolchain only supports mret.
Change-Id: I17e14d4793ae5259f7ce3ce0211cbb27305506cc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15290
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv/virtual_memory.c')
0 files changed, 0 insertions, 0 deletions