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| author | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-09 17:47:37 -0600 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2017-01-14 02:03:27 +0100 |
| commit | a19d44d2764be4dba55cad96abea12d92c8e1f0d (patch) | |
| tree | 6bd9e1a1be2532e0b55d148ed24f0bd011eb2f98 /src/arch/riscv/trap_handler.c | |
| parent | 9d490daf8d8327f8f01123cf152edf75474f54ce (diff) | |
amd/mct: Add default values to highest_rank_count for DDR2
The values of highest_rank_count were undefined on DDR2 systems.
Explcitly define these values on DDR2 platforms.
Found-by: Coverity Scan #1347338
Change-Id: Iad7bb00db97b2816fcc44fb5941bd14373451da2
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18078
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/arch/riscv/trap_handler.c')
0 files changed, 0 insertions, 0 deletions