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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2017-11-24 23:12:14 +0100
committerMartin Roth <martinroth@google.com>2017-12-02 05:24:13 +0000
commit3f75f5da42c30ee9e0b6e20abd8c896aa5cd9dcf (patch)
treeb88e37afd5ae727d283ee59ebbd1184ad1064f09 /src/arch/riscv/trap_handler.c
parent0baad61a4e2f66f91d18578a7260db19a3531caa (diff)
arch/riscv: Unify trap return
Change-Id: I9de0c92b3f925e8f4db00d7281222a07db68b2ae Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21763 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv/trap_handler.c')
-rw-r--r--src/arch/riscv/trap_handler.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c
index 842e3eab3b..288b05d1d1 100644
--- a/src/arch/riscv/trap_handler.c
+++ b/src/arch/riscv/trap_handler.c
@@ -69,7 +69,7 @@ void handle_supervisor_call(trapframe *tf) {
}
tf->gpr[10] = returnValue;
write_csr(mepc, read_csr(mepc) + 4);
- asm volatile("j supervisor_call_return");
+ asm volatile("j trap_return");
}
static const char *const exception_names[] = {
@@ -264,7 +264,7 @@ void handle_misaligned_load(trapframe *tf) {
// return to where we came from
write_csr(mepc, read_csr(mepc) + 4);
- asm volatile("j machine_call_return");
+ asm volatile("j trap_return");
}
void handle_misaligned_store(trapframe *tf) {
@@ -292,5 +292,5 @@ void handle_misaligned_store(trapframe *tf) {
// return to where we came from
write_csr(mepc, read_csr(mepc) + 4);
- asm volatile("j machine_call_return");
+ asm volatile("j trap_return");
}