diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-25 09:32:19 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-26 18:23:52 +0000 |
| commit | 58966086cd437be7d169bfbf0edb6e8827c07e23 (patch) | |
| tree | c79c3fb848fac7225be2ddc48efa417787f6c04d /src/arch/riscv/tables.c | |
| parent | 091dfa1ca027d93fc6a78ded758b6ccd49c0f72a (diff) | |
soc/intel/tigerlake: Lock PAM registers in finalize
Use the support from the previous patch to have coreboot lock the PAM
registers instead of the FSP when the lockdown configuration is set to
coreboot.
Change-Id: Ice4c727f2b75893cd012345a556fd21d9807dfaa
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57147
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch/riscv/tables.c')
0 files changed, 0 insertions, 0 deletions