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authorMaximilian Brune <maximilian.brune@9elements.com>2024-01-24 07:40:14 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-07 22:16:08 +0000
commit33659d246e5d89885413d4ea30525dacdacc56ee (patch)
tree8edc579e917e8af7a3f163a0e428cbafa1505003 /src/arch/riscv/smp.c
parent769af20640d296070ee18d21601d2c08586881f3 (diff)
arch/arm64/armv8: Add exception output without printk
In case printk does not work the current exception handler will print a simple "!" to notify the developer that coreboot is actually there but something went wrong. The "!" can be quite confusing when it actually happens that printk does not work. Since "!" doesn't really say much (if you don't know the exception arm64 code) the developer (like me) can easily assume that something went wrong while configuring clocks or baud rate of UART, since the output seemingly does not seem to make sense. This adds a little bit more output to assure the developer that what was printed was actually intended to be printed. Therefore it prints "EXCEPT" which assures the developer that this was intended output. It also adds a comment above so that developer can more easily grep for this message. It has intentionally not been written as: ``` const char *msg = "\r\n!EXCPT!"; while (*msg) __uart_tx_byte(*msg++); ``` because in this case the compiler will generate code that will place `msg` somewhere in bootblock and the code will try to access this using a memory address. In rare cases (if you link bootblock at the wrong address) this memory address can be wrong and coreboot will not print the message. Using individual calls to `__uart_tx_byte` ensures that the compiler will generate code which directly puts the character bytes into the argument register without referencing a variable in bootblock. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I2f858730469fff3cae120fd7c32fec53b3d309ca Reviewed-on: https://review.coreboot.org/c/coreboot/+/80184 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/smp.c')
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