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| author | Marc Jones <marcj303@gmail.com> | 2017-11-16 15:26:00 -0700 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-11-23 00:34:01 +0000 |
| commit | 17431abab00a0f4bd68edb0abab5e9980a1434e5 (patch) | |
| tree | 9c365122206130cba4f9760a4facdb3729126d8e /src/arch/riscv/sbi.S | |
| parent | 8788fd63952b50e4692efbf75a21bf0608e4c01c (diff) | |
soc/amd/stoneyridge: Get entire DDR4 SPD
Set the SPD size to 512 to get the entire DDR4 SPD.
Change-Id: I0bdf8101de22533b2f4337d3c9e4423d62e6c66d
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/riscv/sbi.S')
0 files changed, 0 insertions, 0 deletions