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authorJulius Werner <jwerner@chromium.org>2016-09-02 23:48:10 -0700
committerPatrick Georgi <pgeorgi@google.com>2016-10-04 21:19:35 +0200
commitf7d519c1c7ba3da1b2e459fa1a82805c70544956 (patch)
tree80e7b14c86480132f8af845acce39b40c8318c2e /src/arch/riscv/sbi.S
parent584dbf2e3a1ac0638ad02c954c2d220278adfbf1 (diff)
rockchip/rk3399: Fix rkclk_init() to actually use PERILP1_PCLK_HZ
This patch fixes a typo in the clock initialization code that caused the PERILP1_PCLK_HZ constant to be ignored and the clock to always run at the same speed as its parent (PERILP1_HCLK_HZ). Since we've done all our previous tests and validation with this bug, we should probably increase the value of the constant (that had not actually been used) to the value that we had been incorrectly using instead (which also makes effective SPI read times faster). BRANCH=None BUG=chrome-os-partner:56556 TEST=Booted Kevin. Change-Id: Ibeb08f5fe5e984a74e3f57e60c62d4bfb644b6ca Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 06e605a5fcb9bdf13a3d301112380633b892fd4e Original-Change-Id: Icb5e079f53eb22b0dbf0ea4d1c2ff08688e3fa8e Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/381031 Original-Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://review.coreboot.org/16703 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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