spike-riscv: Look for the CBFS in RAM

Change-Id: I98927a70adc45d9aca916bd985932b94287921de
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15285
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)

1 files changed, 0 insertions, 26 deletions

diff --git a/src/arch/riscv/rom_media.c b/src/arch/riscv/rom_media.c
deleted file mode 100644
index c1713074f9..0000000000
--- a/src/arch/riscv/rom_media.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <boot_device.h>
-
-/* This assumes that the CBFS resides at 0x0, which is true for the default
- * configuration. */
-static const struct mem_region_device boot_dev =
-	MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
-
-const struct region_device *boot_device_ro(void)
-{
-	return &boot_dev.rdev;
-}