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authorArthur Heymans <arthur@aheymans.xyz>2019-11-21 10:36:56 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-22 10:39:47 +0000
commit61e3d01739fd5e7c85c084cb6c0cd0e7cb5fc89c (patch)
tree88708839d228322cb571b68f3c6c35602f511aa1 /src/arch/riscv/pmp.c
parent50155024141f48cf3048272073d352906a2be0b6 (diff)
MAINTAINERS: Remove FSP1.0 and boards using it
Change-Id: I0c6c36c7a425e8aeae272f5747ce2bdbb7caceaf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37107 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/pmp.c')
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