diff options
| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-02-16 13:36:47 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-02-20 20:46:12 +0000 |
| commit | 042a8336f3eb7c7ed4358a100fae23967346e7a2 (patch) | |
| tree | 50751f64e4352cc518b02b6ce9a9c1a388c23f58 /src/arch/riscv/payload.S | |
| parent | b26759d703b636d1462d31cfa38fd3b3d8c90bfe (diff) | |
arch/riscv: Pass the bootrom-provided FDT to the payload
The RISC-V boot protocol foresees that at every stage boundary (bootrom
to boot loader, boot loader -> OS), register a0 contains the Hart ID and
a1 contains the physical address of the Flattened Device Tree that the
stage shall use.
As a first step, pass the bootrom-provided FDT to the payload,
unmodified.
Change-Id: I468bc64a47153d564087235f1c7e2d10e3d7a658
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/23797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/arch/riscv/payload.S')
| -rw-r--r-- | src/arch/riscv/payload.S | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/src/arch/riscv/payload.S b/src/arch/riscv/payload.S index a189adf1db..1b8cb96110 100644 --- a/src/arch/riscv/payload.S +++ b/src/arch/riscv/payload.S @@ -1,6 +1,9 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2016 Google Inc + * Copyright (C) 2018 Jonathan Neuschäfer + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -11,17 +14,22 @@ * GNU General Public License for more details. */ -// "return" to a payload pointed to by a1 with -// an M-mode pointer (or, to upper levels, physical address) -// to the config string in a0. +// "return" to a payload. a0: FDT, a1: entry point .global riscvpayload riscvpayload: - mv t0,a1 - csrw mepc, t0 - csrr t0, mstatus - li t1, ~(3<<11) - and t0, t0, t1 - li t2, (1<<11) - or t0, t0, t2 - csrw mstatus, t0 + /* Load the entry point */ + mv t0, a1 + csrw mepc, t0 + csrr t0, mstatus + + /* Set mstatus.MPP (the previous privilege mode) to supervisor mode */ + li t1, ~(3<<11) + and t0, t0, t1 + li t2, (1<<11) + or t0, t0, t2 + csrw mstatus, t0 + + /* Pass the right arguments and jump! */ + mv a1, a0 + csrr a0, mhartid mret |