diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-06-04 12:14:44 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-09 02:46:37 +0000 |
| commit | 51b2fd82d32025a47901c5607afa370376fae8f1 (patch) | |
| tree | 601ffb91262dc74e272e88252a4e97307537c10f /src/arch/riscv/misaligned.c | |
| parent | 94cdec686e41fa2d632241c011cef87093cd4c17 (diff) | |
soc/intel/common: Skip SoC GT programming based on CONFIG_SKIP_GRAPHICS_ENABLING
Skip GT specific programming in coreboot to support early
parts without GT enable.
Change-Id: I231e13367cbfbafbfb0cb4235487dbcbcae76820
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33189
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/misaligned.c')
0 files changed, 0 insertions, 0 deletions