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authorMaximilian Brune <maximilian.brune@9elements.com>2024-08-12 03:47:41 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-08-20 12:54:12 +0000
commitdb1e9ce832c4b8aa5d1355b09e353789756ab86a (patch)
tree7a540c12731078de43ae237199d22a548bf3888b /src/arch/riscv/include
parenta985352350b5efa7388cdf9e4db8bc2fac25443f (diff)
arch/riscv: Remove ram probing
Previously RAM probing was necessary for our QEMU-RISCV target in order to find the available amount of memory. Now we get the memory from the devicetree propagated by QEMU, so there is no reason to keep it anymore. Tested: Start QEMU-RISCV and cause an exception to make sure the trap handler still works. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I9b1e0dc78fc2a66d6085fe99a71245ff46f8e63c Reviewed-on: https://review.coreboot.org/c/coreboot/+/83873 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/include')
-rw-r--r--src/arch/riscv/include/arch/exception.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/include/arch/exception.h b/src/arch/riscv/include/arch/exception.h
index 2eb575e608..976d752530 100644
--- a/src/arch/riscv/include/arch/exception.h
+++ b/src/arch/riscv/include/arch/exception.h
@@ -26,7 +26,7 @@ static inline void exception_init(void)
}
void redirect_trap(void);
-void default_trap_handler(struct trapframe *tf);
+void trap_handler(struct trapframe *tf);
void handle_supervisor_call(struct trapframe *tf);
#endif