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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-09-22 13:27:20 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-21 09:18:30 +0000 |
| commit | 3c20cba28930ff86eb65074fc8cb577873901592 (patch) | |
| tree | 67bde77adf0d3de6ea19edc3e5adbf7fed53ef7c /src/arch/riscv/include | |
| parent | b48e6357e823dd6b01c9a0c9122079489ce8f190 (diff) | |
soc/intel/common/smbus: lock TCO base address on PCH finalize
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Idab9419487e6e4cbdecd2efaa4772ff4960c9055
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/arch/riscv/include')
0 files changed, 0 insertions, 0 deletions