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author | Martin Roth <martinroth@google.com> | 2017-07-21 17:10:15 +0000 |
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committer | Martin Roth <martinroth@google.com> | 2017-07-21 17:39:10 +0000 |
commit | 80358a1f478713861a3e66874a1ffb7cf259bd7c (patch) | |
tree | 86c1eff35d648726a2e93617aa2780fb64482028 /src/arch/riscv/boot.c | |
parent | 70de396958627680a16992fbb8c5e6652dd35bf4 (diff) |
Revert "soc/intel/cannonlake: Add postcar stage support"
This reverts commit 399c022a8c6cba7ad6d75fdf377a690395877611.
This was merged too early. I'll repost it.
Change-Id: Iabac0aaa0a16404c885875137cf34bf64bf956f7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20686
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/boot.c')
0 files changed, 0 insertions, 0 deletions