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| author | Xiang Wang <wxjstz@126.com> | 2018-08-27 14:44:19 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-16 08:36:10 +0000 |
| commit | c1dc7932b5ad3fe1f7a67f167b202c9019714466 (patch) | |
| tree | ed16e3a8a8978dddd89eebf252151e8da6eba43a /src/arch/riscv/boot.c | |
| parent | 8db79c138689be653e26c9318ea3dc680b79083d (diff) | |
riscv: don't write to mstatus.XS
XS is a read-only field of mstatus. Unable to be write. So remove this code.
Change-Id: I3ad6b0029900124ac7cce062e668a0ea5a8b2c0e
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/28357
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/riscv/boot.c')
0 files changed, 0 insertions, 0 deletions