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authorNaresh Solanki <Naresh.Solanki@9elements.com>2023-08-25 12:58:11 +0200
committerMartin L Roth <gaumless@gmail.com>2023-09-01 21:13:09 +0000
commit4d0b18480d7d0a85bef0d1adcf4837549118473e (patch)
tree9a4baaf117cd720ce07bdac28d745c9fd1238fd7 /src/arch/riscv/Makefile.inc
parentd888f61f083cc68ff891b4b21191e1a8c5647307 (diff)
acpi/acpi.c: Accomodate 64bit MMCONF base in MCFG table
Allow the use of 64bit MMCONF base in MCFG table. Previously only 32 bits were utilized for MMCONF base, while the remaining 32bits were reserved & held value of zero as evident from MCFG table disassembly. This commit entails updating the 'base_address' field in the 'mmconfig' structure to 64 bits and removing the 'base_reserved' field. TEST=Confirmed the functionality of the 64bit MMCONF base in the MCFG table disassembly below Signature : "MCFG" Table Length : 0000003C Revision : 01 Checksum : BD Oem ID : "COREv4" Oem Table ID : "COREBOOT" Oem Revision : 00000000 Asl Compiler ID : "CORE" Asl Compiler Revision : 20230628 Reserved : 0000000000000000 Base Address : 0000001010000000 Segment Group Number : 0000 Start Bus Number : 00 End Bus Number : FF Reserved : 00000000 Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com> Change-Id: I2f4bc727c3239bf941e1a09bc277ed66ae6b0185 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77539 Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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