riscv-trap-handling: Add implementation for trap calls in riscv

RISCV requires the bios/bootloader to set up an interface by which it
can get information about memory, talk to host devices, etc. Put
implementation for spike in
src/mainboard/emulation/spike-riscv/spike_util.c, and
src/arch/riscv/trap_handler.c

Change-Id: Ie1d5f361595e48fa6cc1fac25485ad623ecdc717
Signed-off-by: Thaminda Edirisooriya <thaminda@google.com>
Reviewed-on: http://review.coreboot.org/11368
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 5233faa04b..6fac99c290 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -29,6 +29,8 @@ riscv_asm_flags =
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_RISCV),y)
 
 bootblock-y = bootblock.S stages.c
+bootblock-y += trap_util.S
+bootblock-y += trap_handler.c
 bootblock-y += boot.c
 bootblock-y += rom_media.c
 bootblock-y += \