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authorMartin Roth <martinroth@chromium.org>2021-04-05 17:35:59 -0600
committerPatrick Georgi <pgeorgi@google.com>2021-04-08 06:48:01 +0000
commit3db49929bd7d755aad920ae6b8757bba57864989 (patch)
tree8cc1cc98e9d3e08794e5f9c9b630565ff140461c /src/arch/ppc64/include
parenta3d33795f81417c548e562f7cf12102d41d44f85 (diff)
mb/google/guybrush: PCIe GPIOs - enable enables, disable resets
To train PCIe devices, the devices need to be enabled and taken out of reset. This patch does the bare minimum needed to train PCIe. It is not intended to handle timings, which will be addressed later. Copy the enables for WWAN & WLAN into early GPIO Init so that they're enabled before FSP-M runs and trains the PCIe busses. Again, this patch is the minimum to let the FSP train the PCIe busses. BUG=b:182202136 TEST=Boot guybrush from NVME. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I3807e02de1e9ae40b0a4162217afd6aabb5b04ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/52115 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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