diff options
| author | Igor Bagnucki <igor.bagnucki@3mdeb.com> | 2020-12-14 14:52:50 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-11 13:53:29 +0000 |
| commit | 252fc29d1afc4c1eb42122ed302a0d25a3331e7c (patch) | |
| tree | a4f9f1ca0aead8182b52b7ab53ac4fc547c25fc1 /src/arch/ppc64/include | |
| parent | 3c00c7ec6b1a26699f7aab39c6cb702aa16a3d42 (diff) | |
src/cpu/power9: add file structure for power9, implement SCOM access
Change-Id: Ib555ce51294c94b22d9a7c0db84d38d7928f7015
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/arch/ppc64/include')
| -rw-r--r-- | src/arch/ppc64/include/arch/byteorder.h | 12 | ||||
| -rw-r--r-- | src/arch/ppc64/include/arch/io.h | 1 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/arch/ppc64/include/arch/byteorder.h b/src/arch/ppc64/include/arch/byteorder.h index 79f15b1eb3..8ff857675c 100644 --- a/src/arch/ppc64/include/arch/byteorder.h +++ b/src/arch/ppc64/include/arch/byteorder.h @@ -5,4 +5,16 @@ #define __BIG_ENDIAN 4321 +#define PPC_BIT(bit) (0x8000000000000000UL >> (bit)) +#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) + +#ifndef __ASSEMBLER__ + +#include <types.h> +#define PPC_SHIFT(val, lsb) (((uint64_t)(val)) << (63 - (lsb))) + +#else +#define PPC_SHIFT(val, lsb) ((val) << (63 - (lsb))) +#endif + #endif /* _BYTEORDER_H */ diff --git a/src/arch/ppc64/include/arch/io.h b/src/arch/ppc64/include/arch/io.h index 132a5ce353..6dc0a84b6c 100644 --- a/src/arch/ppc64/include/arch/io.h +++ b/src/arch/ppc64/include/arch/io.h @@ -9,6 +9,7 @@ #define MMIO_GROUP0_CHIP0_LPC_BASE_ADDR 0x8006030000000000 #define LPCHC_IO_SPACE 0xD0010000 #define LPC_BASE_ADDR (MMIO_GROUP0_CHIP0_LPC_BASE_ADDR + LPCHC_IO_SPACE) +#define MMIO_GROUP0_CHIP0_SCOM_BASE_ADDR 0x800603FC00000000 /* Enforce In-order Execution of I/O */ static inline void eieio(void) |