diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-10-28 19:38:58 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2009-10-28 19:38:58 +0000 |
commit | e696942cfc6d970d9a774815cc81bf1d771c857b (patch) | |
tree | 810516e157f08970fc6e9b2b5c07d1c6f176726d /src/arch/ppc/init/ldscript.lb | |
parent | 8d09e231fed1395b82227ce374dca4be32e77845 (diff) |
Drop remainder of PPC port
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch/ppc/init/ldscript.lb')
-rw-r--r-- | src/arch/ppc/init/ldscript.lb | 106 |
1 files changed, 0 insertions, 106 deletions
diff --git a/src/arch/ppc/init/ldscript.lb b/src/arch/ppc/init/ldscript.lb deleted file mode 100644 index 453c99c13b..0000000000 --- a/src/arch/ppc/init/ldscript.lb +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Memory map: - * - * CONFIG_ROMBASE : start of ROM - * CONFIG_RESET : reset vector (may be at top of ROM) - * _EXCEPTIONS_VECTORS : exception table - * - * CONFIG_ROMSTART : coreboot text - * : payload text - * - * CONFIG_RAMBASE : address to copy payload - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - * Re-rewritten by Greg Watson for PPC - */ - -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ - -OUTPUT_FORMAT("elf32-powerpc") -ENTRY(_start) - -TARGET(binary) -INPUT(coreboot_ram.rom) -SECTIONS -{ - /* - * Absolute location of base of ROM - */ - . = CONFIG_ROMBASE; - - /* - * Absolute location of reset vector. This may actually be at the - * the top of ROM. - */ - . = CONFIG_RESET; - .reset . : { - *(.rom.reset); - . = ALIGN(16); - } - - /* - * Absolute location of exception vector table. - */ - . = CONFIG_EXCEPTION_VECTORS; - .exception_vectors . : { - *(.rom.exception_vectors); - . = ALIGN(16); - } - - /* - * Absolute location of coreboot initialization code in ROM. - */ - . = CONFIG_ROMSTART; - .rom . : { - _rom = .; - *(.rom.text); - *(.text); - *(.rom.data); - *(.rodata); - *(EXCLUDE_FILE(coreboot_ram.rom) .data); - . = ALIGN(16); - _erom = .; - } - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - - /* - * Ram is the coreboot code that runs from RAM. - */ - .ram . : { - _ram = . ; - coreboot_ram.rom(*) - _eram = . ; - } - - .sdata : { - _SDA_BASE_ = .; - *(.sdata) - } - - .sdata2 : { - _SDA2_BASE_ = .; - *(.sdata2) - } - - - - /* - * Absolute location of where coreboot will be relocated in RAM. - */ - _iseg = CONFIG_RAMBASE; - _eiseg = _iseg + SIZEOF(.ram); - _liseg = _ram; - _eliseg = _eram; - - /DISCARD/ : { - *(.comment) - *(.note) - } -} |