diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2015-02-05 13:31:41 -0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:12:07 +0200 |
commit | 3537e956e1ee2d189876fb47a09b65e96ed3c8f4 (patch) | |
tree | 484c9a8b41be11273089bba3cfff6bb285803ac8 /src/arch/mips/mmu.c | |
parent | df4081e72cda341236350647f96b419e03b9edce (diff) |
mips: Allow memory to be identity mapped in the TLB
Introduce identity_map() function. It takes a memory range and
identity maps it entirely in the TLB table, if possible. As a result
the virtual and physical address ranges are the same.
The function attempts to use as large of a page size as possible for
each region in order to conserve TLB entries.
BUG=chrome-os-partner:36258
BRANCH=none
TEST=Build and boot on Pistachio with the rest of the patches applied.
Change-Id: I4d781b04699e069a71c49a0c6ca15c7a6b42a468
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 234d32edfd201019b7a723316a79c932c62ce87e
Original-Change-Id: If3e2392b19555cb6dbae8b5559c1b1e53a313637
Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/246693
Reviewed-on: http://review.coreboot.org/9815
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/mips/mmu.c')
-rw-r--r-- | src/arch/mips/mmu.c | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/src/arch/mips/mmu.c b/src/arch/mips/mmu.c new file mode 100644 index 0000000000..f6944ddad3 --- /dev/null +++ b/src/arch/mips/mmu.c @@ -0,0 +1,105 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <arch/cpu.h> +#include <arch/mmu.h> +#include <console/console.h> +#include <stddef.h> +#include <stdint.h> +#include <stdlib.h> + +#define MIN_PAGE_SIZE (4 * KiB) + +static int add_wired_tlb_entry(uint32_t entrylo0, uint32_t entrylo1, + uint32_t entryhi, uint32_t pgsize) +{ + uint32_t tlbindex; + + tlbindex = read_c0_wired(); + if (tlbindex >= get_tlb_size() || tlbindex >= C0_WIRED_MASK) { + printk(BIOS_ERR, "Ran out of TLB entries\n"); + return -1; + } + write_c0_wired(tlbindex + 1); + write_c0_index(tlbindex); + write_c0_pagemask(((pgsize / MIN_PAGE_SIZE) - 1) << C0_PAGEMASK_SHIFT); + write_c0_entryhi(entryhi); + write_c0_entrylo0(entrylo0); + write_c0_entrylo1(entrylo1); + mtc0_tlbw_hazard(); + tlb_write_indexed(); + tlbw_use_hazard(); + + return 0; +} + +static uint32_t pick_pagesize(uint32_t start, uint32_t len) +{ + uint32_t pgsize, max_pgsize; + + max_pgsize = get_max_pagesize(); + for (pgsize = max_pgsize; + pgsize >= MIN_PAGE_SIZE; + pgsize = pgsize / 4) { + /* + * Each TLB entry maps a pair of virtual pages. To avoid + * aliasing, pick the largest page size that is at most + * half the size of the region we're trying to map. + */ + if (IS_ALIGNED(start, 2 * pgsize) && (2 * pgsize <= len)) + break; + } + + return pgsize; +} + +/* + * Identity map the memory from [start,start+len] in the TLB using the + * largest suitable page size so as to conserve TLB entries. + */ +int identity_map(uint32_t start, size_t len) +{ + uint32_t pgsize, pfn, entryhi, entrylo0, entrylo1; + + while (len > 0) { + pgsize = pick_pagesize(start, len); + entryhi = start; + pfn = start >> 12; + entrylo0 = (pfn << C0_ENTRYLO_PFN_SHIFT) | C0_ENTRYLO_WB | + C0_ENTRYLO_D | C0_ENTRYLO_V | C0_ENTRYLO_G; + start += pgsize; + len -= MIN(len, pgsize); + if (len >= pgsize) { + pfn = start >> 12; + entrylo1 = (pfn << C0_ENTRYLO_PFN_SHIFT) | + C0_ENTRYLO_WB | C0_ENTRYLO_D | C0_ENTRYLO_V | + C0_ENTRYLO_G; + start += pgsize; + len -= MIN(len, pgsize); + } else { + entrylo1 = 0; + } + if (add_wired_tlb_entry(entrylo0, entrylo1, entryhi, pgsize)) + return -1; + } + + return 0; +} |