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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-06-05 16:46:48 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-06-12 14:52:17 +0200 |
| commit | 6c3c31e49d6b53d549de5c815ed9a2f7ab5a3521 (patch) | |
| tree | 8ad2a7a33ea17a09ee9b3792ca84bb20bdcfb27f /src/arch/mips/cache.c | |
| parent | 065b683618f8455dcb0bfc271a853d1c88a23734 (diff) | |
bootblock: Declare common bootblock_pre_c_entry routine
Enable uses of a common bootblock_pre_c_entry routine. Pass in TSC
value as a uint64_t value.
TEST=Build for amenia and Galileo Gen2
Change-Id: I8be2e079ababb2cf1f9b7e6293f93e7c778761a1
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15124
Tested-by: build bot (Jenkins)
Reviewed-by: Lee Leahy <lpleahyjr@gmail.com>
Diffstat (limited to 'src/arch/mips/cache.c')
0 files changed, 0 insertions, 0 deletions